[sr-dev] git:master:65fab0d0: core: atomic - updated email addres in warning message

Module: kamailio Branch: master Commit: 65fab0d02271c242d6e43e499198ee1da2275a4b URL: https://github.com/kamailio/kamailio/commit/65fab0d02271c242d6e43e499198ee1… Author: Daniel-Constantin Mierla <miconda(a)gmail.com> Committer: Daniel-Constantin Mierla <miconda(a)gmail.com> Date: 2018-02-14T11:23:55+01:00 core: atomic - updated email addres in warning message --- Modified: src/core/atomic/atomic_alpha.h Modified: src/core/atomic/atomic_mips2.h Modified: src/core/atomic/atomic_ppc.h --- Diff: https://github.com/kamailio/kamailio/commit/65fab0d02271c242d6e43e499198ee1… Patch: https://github.com/kamailio/kamailio/commit/65fab0d02271c242d6e43e499198ee1… --- diff --git a/src/core/atomic/atomic_alpha.h b/src/core/atomic/atomic_alpha.h index 3eecb91381..56ee8cde73 100644 --- a/src/core/atomic/atomic_alpha.h +++ b/src/core/atomic/atomic_alpha.h @@ -36,7 +36,7 @@ #define HAVE_ASM_INLINE_MEMBAR #warning alpha atomic code was not tested, please report problems to \ - serdev(a)iptel.org or andrei(a)iptel.org + sr-dev(a)lists.kamailio.org #ifdef NOSMP #define membar() asm volatile ("" : : : "memory") /* gcc do not cache barrier*/ diff --git a/src/core/atomic/atomic_mips2.h b/src/core/atomic/atomic_mips2.h index 7d19b4ad87..9c6a1e5643 100644 --- a/src/core/atomic/atomic_mips2.h +++ b/src/core/atomic/atomic_mips2.h @@ -39,7 +39,7 @@ #ifdef __CPU_mips64 #warning mips64 atomic code was not tested, please report problems to \ - serdev(a)iptel.org or andrei(a)iptel.org + sr-dev(a)lists.kamailio.org #endif #ifdef NOSMP diff --git a/src/core/atomic/atomic_ppc.h b/src/core/atomic/atomic_ppc.h index bb8c43a121..2eefa79b26 100644 --- a/src/core/atomic/atomic_ppc.h +++ b/src/core/atomic/atomic_ppc.h @@ -38,7 +38,7 @@ #ifdef __CPU_ppc64 #warning powerpc64 atomic code was not tested, please report problems to \ - serdev(a)iptel.org or andrei(a)iptel.org + sr-dev(a)lists.kamailio.org #endif