First try to compile Openser on an AMD Semperon CPU:
openser-1.1.0-tls> make all Compiling action.c gcc -g -O9 -funroll-loops -Wcast-align -Wall -minline-all-stringops -falign-loops -ftree-vectorize -mtune=x86_64 -DNAME='"openser"' -DVERSION='"1.1.0-notls"' -DARCH='"x86_64"' -DOS='"linux"' -DCOMPILER='"gcc 4.1.0"' -D__CPU_x86_64 -D__OS_linux -D__SMP_no -DCFG_DIR='"/usr/local/etc/openser/"' -DPKG_MALLOC -DSHM_MEM -DSHM_MMAP -DUSE_IPV6 -DUSE_MCAST -DUSE_TCP -DDISABLE_NAGLE -DHAVE_RESOLV_RES -DF_MALLOC -DSTATISTICS -DFAST_LOCK -DADAPTIVE_WAIT -DADAPTIVE_WAIT_LOOPS=1024 -DHAVE_GETHOSTBYNAME2 -DHAVE_UNION_SEMUN -DHAVE_SCHED_YIELD -DHAVE_MSG_NOSIGNAL -DHAVE_MSGHDR_MSG_CONTROL -DHAVE_ALLOCA_H -DHAVE_TIMEGM -DHAVE_EPOLL -DHAVE_SIGIO_RT -DHAVE_SELECT -c action.c -o action.o action.c:1: error: bad value (x86_64) for -mtune= switch make: *** [action.o] Error 1
How can I solve that?
bye
Ronald
Ronald Wiplinger wrote:
First try to compile Openser on an AMD Semperon CPU:
openser-1.1.0-tls> make all Compiling action.c gcc -g -O9 -funroll-loops -Wcast-align -Wall -minline-all-stringops -falign-loops -ftree-vectorize -mtune=x86_64 -DNAME='"openser"' -DVERSION='"1.1.0-notls"' -DARCH='"x86_64"' -DOS='"linux"' -DCOMPILER='"gcc 4.1.0"' -D__CPU_x86_64 -D__OS_linux -D__SMP_no -DCFG_DIR='"/usr/local/etc/openser/"' -DPKG_MALLOC -DSHM_MEM -DSHM_MMAP -DUSE_IPV6 -DUSE_MCAST -DUSE_TCP -DDISABLE_NAGLE -DHAVE_RESOLV_RES -DF_MALLOC -DSTATISTICS -DFAST_LOCK -DADAPTIVE_WAIT -DADAPTIVE_WAIT_LOOPS=1024 -DHAVE_GETHOSTBYNAME2 -DHAVE_UNION_SEMUN -DHAVE_SCHED_YIELD -DHAVE_MSG_NOSIGNAL -DHAVE_MSGHDR_MSG_CONTROL -DHAVE_ALLOCA_H -DHAVE_TIMEGM -DHAVE_EPOLL -DHAVE_SIGIO_RT -DHAVE_SELECT -c action.c -o action.o action.c:1: error: bad value (x86_64) for -mtune= switch make: *** [action.o] Error 1
How can I solve that?
bye
Ronald
Users mailing list Users@openser.org http://openser.org/cgi-bin/mailman/listinfo/users
GCC 4.1???
The manual says these are your options for the -mtune switch
k6 AMD K6 CPU with MMX instruction set support. k6-2, k6-3 Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support. athlon, athlon-tbird AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support. athlon-4, athlon-xp, athlon-mp Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support. k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
so there is no x86_64 (or x86-64) cpu type in 4.1
You could try compiling with gcc 3.4 if you have it..
nick wrote:
Ronald Wiplinger wrote:
First try to compile Openser on an AMD Semperon CPU:
openser-1.1.0-tls> make all Compiling action.c gcc -g -O9 -funroll-loops -Wcast-align -Wall -minline-all-stringops -falign-loops -ftree-vectorize -mtune=x86_64 -DNAME='"openser"' -DVERSION='"1.1.0-notls"' -DARCH='"x86_64"' -DOS='"linux"' -DCOMPILER='"gcc 4.1.0"' -D__CPU_x86_64 -D__OS_linux -D__SMP_no -DCFG_DIR='"/usr/local/etc/openser/"' -DPKG_MALLOC -DSHM_MEM -DSHM_MMAP -DUSE_IPV6 -DUSE_MCAST -DUSE_TCP -DDISABLE_NAGLE -DHAVE_RESOLV_RES -DF_MALLOC -DSTATISTICS -DFAST_LOCK -DADAPTIVE_WAIT -DADAPTIVE_WAIT_LOOPS=1024 -DHAVE_GETHOSTBYNAME2 -DHAVE_UNION_SEMUN -DHAVE_SCHED_YIELD -DHAVE_MSG_NOSIGNAL -DHAVE_MSGHDR_MSG_CONTROL -DHAVE_ALLOCA_H -DHAVE_TIMEGM -DHAVE_EPOLL -DHAVE_SIGIO_RT -DHAVE_SELECT -c action.c -o action.o action.c:1: error: bad value (x86_64) for -mtune= switch make: *** [action.o] Error 1
How can I solve that?
bye
Ronald
Users mailing list Users@openser.org http://openser.org/cgi-bin/mailman/listinfo/users
GCC 4.1???
The manual says these are your options for the -mtune switch
k6 AMD K6 CPU with MMX instruction set support. k6-2, k6-3 Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support. athlon, athlon-tbird AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support. athlon-4, athlon-xp, athlon-mp Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support. k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
so there is no x86_64 (or x86-64) cpu type in 4.1
I got a hint, but I do not know how to implement that:
so there is no x86_64 (or x86-64) cpu type in 4.1
Not true. There is no x86_64, but while x86-64 is deprecated, it is still permissable. If you are building code for the platform you are running on, then you can use one of the -mtune=k8 or -mtune=generic or -mtune=prescott, or simply let the compiler figure it out. Or better use the -m64 option which will cause the compiler to build for a generic x86-64 platform.
Can anybody tell me how to do that?
bye
Ronald
Ronald Wiplinger wrote:
nick wrote:
Ronald Wiplinger wrote:
First try to compile Openser on an AMD Semperon CPU:
openser-1.1.0-tls> make all Compiling action.c gcc -g -O9 -funroll-loops -Wcast-align -Wall -minline-all-stringops -falign-loops -ftree-vectorize -mtune=x86_64 -DNAME='"openser"' -DVERSION='"1.1.0-notls"' -DARCH='"x86_64"' -DOS='"linux"' -DCOMPILER='"gcc 4.1.0"' -D__CPU_x86_64 -D__OS_linux -D__SMP_no -DCFG_DIR='"/usr/local/etc/openser/"' -DPKG_MALLOC -DSHM_MEM -DSHM_MMAP -DUSE_IPV6 -DUSE_MCAST -DUSE_TCP -DDISABLE_NAGLE -DHAVE_RESOLV_RES -DF_MALLOC -DSTATISTICS -DFAST_LOCK -DADAPTIVE_WAIT -DADAPTIVE_WAIT_LOOPS=1024 -DHAVE_GETHOSTBYNAME2 -DHAVE_UNION_SEMUN -DHAVE_SCHED_YIELD -DHAVE_MSG_NOSIGNAL -DHAVE_MSGHDR_MSG_CONTROL -DHAVE_ALLOCA_H -DHAVE_TIMEGM -DHAVE_EPOLL -DHAVE_SIGIO_RT -DHAVE_SELECT -c action.c -o action.o action.c:1: error: bad value (x86_64) for -mtune= switch make: *** [action.o] Error 1
How can I solve that?
bye
Ronald
Users mailing list Users@openser.org http://openser.org/cgi-bin/mailman/listinfo/users
GCC 4.1???
The manual says these are your options for the -mtune switch
k6 AMD K6 CPU with MMX instruction set support. k6-2, k6-3 Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support. athlon, athlon-tbird AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support. athlon-4, athlon-xp, athlon-mp Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support. k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
so there is no x86_64 (or x86-64) cpu type in 4.1
I got a hint, but I do not know how to implement that:
so there is no x86_64 (or x86-64) cpu type in 4.1 Not true. There is no x86_64, but while x86-64 is deprecated, it is still permissable. If you are building code for the platform you are running on, then you can use one of the -mtune=k8 or -mtune=generic or -mtune=prescott, or simply let the compiler figure it out. Or better use the -m64 option which will cause the compiler to build for a generic x86-64 platform.
Can anybody tell me how to do that?
bye
Ronald
I can't find any command line options, looks like the only way is to modify the Makefile.defs (though that looks like a minefield also...)
It might be ad avisable to ask a developer here what to modify, because I'm not that versed in the modification of makefiles.
The other option, if you have an older GCC on your system, you can do a make CC=gcc-3-x all (x being whatever cc you have installed).
-
nick -
Ronald Wiplinger